Conventional semiconductor apparatuses are equipped with a protection circuit at the inner side of an input pad thereof, in order to prevent the semiconductor apparatuses from breaking down due to electrostatic current, as shown in Japanese Patent Laid-Open Publication No. 9-17954, for example.
FIG. 8 shows a circuit diagram of such a conventional semiconductor apparatus 1000 having a protection circuit. The semiconductor apparatus 1000 is equipped with a protection circuit 50 between an input part (IN) 6 and semiconductor devices 10. The protection circuit 50 comprises a protection resistance 2 and a protection transistor 9 functioning as a diode.
In the protection circuit 50, electrostatic electricity (charges) input at the input part (IN) flows through the protection resistance 2, resulting in reducing the electrostatic voltage and protecting internal semiconductor devices. In a case where the voltage input at the input part is very high and cannot be reduced enough by the protection resistance 2, the protection transistor 9 turns ON and allows the electrostatic charges to flow down to the ground Vss to protect the internal semiconductor devices 10. In this specification and claims, the protection transistor and devices in the semiconductor device side are collectively referred to as “internal circuitry”.
FIG. 9 is a cross-sectional view of the semiconductor apparatus 1000. An input pad 6 is formed integrally with a metal wiring layer (ME1) 5. A protection resistance 2 is formed by an N-well in a semiconductor substrate 1. In the N-well, a first electrode 3 of an N+ region and a second electrode 4 of an N+ region are provided. The first electrode 3 is connected to the input pad 6 via the metal wiring layer (ME1) 5. The second electrode 4 is connected to a drain of a protection transistor 9 via another metal wiring layer (ME2) 7. A gate and a source of the protection transistor 9 are shorted and connected to ground Vss. The semiconductor devices in the internal circuitry are connected to the metal wiring layer (ME2) 7.
In order to supply the semiconductor apparatus with electric power, a P+ region independently formed in the silicon substrate 1 is connected to ground Vss, and an N+ region independently formed in the silicon substrate 1 is connected to a positive power supply Vdd.
The semiconductor apparatus 1000 is fully covered and insulated with an oxide layer 8, except an opening for the input pad 6. The metal wiring layer (ME1) 5 of the input pad 6 and the silicon substrate 1 are insulated with the silicon oxide layer 8.
As mentioned above, when high voltage static electricity is applied to the input pad 6, the electrostatic current normally flowing from the input pad 6 through the metal wiring layer (ME1) 5 and the protection resistance 2 to the metal wiring layer 7 (ME2), further flows through the drain and source of the protection transistor 9 to ground Vss. As a result, the internal semiconductor devices connected to the metal wiring layer (ME2) are not damaged.
There are other routes in which the electrostatic current flows from the first electrode 3 of the protection resistance 2, such as through the N-well region, to the positive power supply Vdd, or to ground Vss.
However, as shown in FIG. 10, in the conventional semiconductor apparatus 1000 the protection resistance 2 is placed between the input pad 6 and the internal circuitry 10. The first electrode 3 of the protection resistance 2 has substantially the same electrical potential as the input pad 6, and the first electrode 3 is formed in the silicon substrate 1; therefore electric discharge (leakage) occurs from the first electrode 3 to other circuitry formed in the silicon substrate 1, especially to semiconductor devices formed in the internal circuitry region 10, resulting in the breakdown of the semiconductor devices. In order to prevent such electric discharge, a length L2 between the internal circuitry region 10 and the first electrode 3 needs to be increased, but that makes it difficult to miniaturize and highly integrate semiconductor devices.
As shown in FIG. 11, in a case where the input pad 6 is placed at a peripheral portion of the semiconductor apparatus 1100, especially adjacent to a corner, a length L3 between the internal circuitry region 10 and the first electrode 3 needs to be further increased, making it more difficult to miniaturize the semiconductor apparatus 1100.